This application claims priority from Korean patent application No. 2000-20654 filed Apr. 19, 2000 in the name of Samsung Electronics Co., Ltd., which is herein incorporated by reference.
1. Field of the Invention
The present invention relates generally to testing semiconductor devices, and more particularly a method and apparatus for testing semiconductor devices using the back side of a circuit board.
2. Description of the Related Art
After completion of the wafer-fabrication and packaging processes, semiconductor devices are tested for reliability. When testing memory devices such as SDRAM (Synchronous Dynamic Random Access Memory), Rambus DRAM or SRAM (Static Random Access Memory), the packaged device is inserted into a test socket which interfaces the device to test equipment that checks the electrical and functional characteristics as well as the reliability of the device.
Conventional test equipment, which is relatively expensive, raises the cost of the test process and consequently imposes a heavy cost burden on the end-consumer of the finished products. In addition, since conventional test equipment cannot duplicate the actual operating conditions for the device under test (DUT), the testing process has a low accuracy. Therefore, it is recognized that testing under actual conditions, where the assembled devices are actually used, is preferable to using test equipment.
In order to test memory devices under the actual operating conditions, a memory device is coupled to a mother board for a personal computer or a workstation, and tested by operating the personal computer or the workstation. Memory devices are usually coupled to mother boards by mounting several memory devices to a memory module and then plugging the memory module into a socket on the mother board.
FIG. 1 and FIG. 2 are top and side views, respectively, showing a conventional test apparatus 150 for semiconductor devices mounted on a memory module. The memory module 15 is inserted directly into a socket 153 mounted on a mother board 151. However, since peripheral components such as add-in boards 161a and 161b around the socket 153 obstruct the insertion and removal of the memory module 15, it is difficult to accurately test the memory module. The lack of space around the socket 153 also makes it impossible to automate the insertion and removal of the memory module.
FIG. 3 and FIG. 4 are top and side views, respectively, showing another conventional test apparatus 170 which prevents obstruction by peripheral components such as add-in boards 181a and 181b mounted on the mother board 171. In order to obtain sufficient space, the test apparatus 170 employs an extension board 174 inserted into a first socket 173 and a second socket 176. The test apparatus 170 further comprises an interconnection board 175 to test the memory module 15. The interface board 175 is fixed to the motherboard 171 by fasteners 185. The test apparatus 170 is an improvement over the test apparatus 150 of FIG. 1. However, the structure increases the length of the contact points, and therefore, it is difficult to apply to high-speed products because it causes delay and/or distortion of the electrical signals. An additional problem with the test apparatus 170 is that it only provides week support for the test sockets 177.
One aspect of the present invention is a system for testing a semiconductor device comprising a circuit board comprising circuitry adapted to provide an actual operating environment for the semiconductor device, the circuit board having a front side and a back side; and test terminals formed on the back side of the circuit board and arranged to couple the semiconductor device to the circuit board.
Another aspect of the present invention is a method for testing a semiconductor device comprising coupling the semiconductor device to the back side of a circuit board comprising circuitry adapted to provide an actual operating environment for the semiconductor device; and operating the circuitry on the circuit board.